diff --git a/bucket/yosys.json b/bucket/yosys.json
new file mode 100644
index 0000000000..0225d9504f
--- /dev/null
+++ b/bucket/yosys.json
@@ -0,0 +1,21 @@
+{
+    "version": "0.9",
+    "description": "Open source framework for Verilog RTL synthesis.",
+    "homepage": "http://www.clifford.at/yosys/about.html",
+    "license": "ISC",
+    "url": "http://www.clifford.at/yosys/nogit/win32/yosys-win32-mxebin-0.9.zip",
+    "hash": "D638D860DFF1F351C15FF0CAEAA668742649677B874B1A9BDB0B6CE0E54840F5",
+    "extract_dir": "yosys-win32-mxebin-0.9",
+    "bin": [
+        "yosys.exe",
+        "yosys-abc.exe"
+    ],
+    "checkver": {
+        "url": "http://www.clifford.at/yosys/download.html",
+        "regex": "yosys-win32-mxebin-([\\d.]+).zip"
+    },
+    "autoupdate": {
+        "url": "http://www.clifford.at/yosys/nogit/win32/yosys-win32-mxebin-$version.zip",
+        "extract_dir": "yosys-win32-mxebin-$version"
+    }
+}